Present functional, or logic, circuitry may be quite complex in including a large number of semiconductor circuits, or devices that may be incorporated in electronic printed circuit board assemblies, forming parts of an electronic system. Such circuity is tested during assembly and may also be subsequently tested periodically. Conventionally there are employed parallel data based tested equipment and serial data input/output techniques which are substantially incompatible. Each of the foregoing, however, have certain advantages and the present invention provides the capability of employing serial data based test equipment and methods to more efficiently evaluate parallel logic states within the functional combinatorial and sequential circuitry to which it is applied and to allow parallel data of, or in conjunction with, the serial data input/output techniques required by other testability enhancement architectures and circuits.